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Please use this identifier to cite or link to this item: http://hdl.handle.net/2014/42399

Title: Physics of failure analysis of Xilinx Flip chip CCGA packages.
Authors: Suh, Jong-ook
Agarwal, Shri
Dillon, Peter
Sheldon, Doug
Keywords: nonā€hermetic flip chip
reliability testing
failure analysis
Issue Date: 11-Jun-2012
Publisher: Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2012.
Citation: 3rd Annual NEPP Electronic Technology Workshop (ETW), Greenbelt, Maryland, June 11-13, 2012.
URI: http://hdl.handle.net/2014/42399
Appears in Collections:JPL TRS 1992+

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