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http://hdl.handle.net/2014/42020
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| Title: | Xilinx V4 Package reliability : properties and reliability of LP2 underfill material |
| Authors: | Suh, Jong-ook Dillon, Robert Peter |
| Keywords: | field programmable gate array (FPGA) Xilinx Virtex 4 (V4) non-hermetically packaging |
| Issue Date: | Mar-2012 |
| Publisher: | Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2012. |
| Series/Report no.: | JPL Publication 12-6 |
| Abstract: | The Xilinx V4 is a strong candidate for the next-generation FPGA for NASA applications. The major concern regarding the V4 is its non-hermeticity. Due to the non-hermeticity, the underfill material, LP2, will be directly exposed to the LEO environment, albeit within a spacecraft, during the mission. In the current task, reliability of the V4 package was studied in terms of the underfill material under the flight mission environment. During FY11, raw LP2 underfill material was procured and went through a series of tests to measure its properties and to study its behavior. We have confirmed that properties such as Tg, CTE, Young’s modulus, and lap shear strength of the LP2 underfill are suitable for high-reliability ceramic flip chip package applications. We also confirmed that the LP2 underfill material maintains high lap shear strength under a wide range of temperatures relevant to space applications. The LP2 underfill material has good outgassing reliability under both vacuum thermal cycling and radiation environment. |
| URI: | http://hdl.handle.net/2014/42020 |
| Appears in Collections: | JPL TRS 1992+
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