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Title: Reliability of CGA/LGA/HDI Package Board/Assembly
Authors: Ghaffarian, Reza
Keywords: BME Capacitor
thermal cycle
solder joint reliability
column grid array (CGA)
ceramic column grid array (CCGA)
Issue Date: Feb-2012
Publisher: Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2012.
Series/Report no.: JPL Publication
12-3 Revision A
Abstract: This follow-up report presents reliability test results conducted by thermal cycling of five CGA assemblies evaluated under two extreme cycle profiles, representative of use for high-reliability applications. The thermal cycles ranged from a low temperature of −55°C to maximum temperatures of either 100°C or 125°C with slow ramp-up rate (3°C/min) and dwell times of about 15 minutes at the two extremes. Optical photomicrographs that illustrate key inspection findings of up to 200 thermal cycles are presented. Other information presented include an evaluation of the integrity of capacitors on CGA substrate after thermal cycling as well as process evaluation for direct assembly of an LGA onto PCB. The qualification guidelines, which are based on the test results for CGA/LGA/HDI packages and board assemblies, will facilitate NASA projects’ use of very dense and newly available FPGA area array packages with known reliably and mitigation risks, allowing greater processing power in a smaller board footprint and lower system weight.
Appears in Collections:JPL TRS 1992+

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