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http://hdl.handle.net/2014/41478
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| Title: | NASA 2009 Body of Knowledge (BoK) through - silicon via technology |
| Authors: | Gerke, David |
| Keywords: | through silicon vias
electronic packaging
3D packaging |
| Issue Date: | Nov-2009 |
| Publisher: | Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2009 |
| Series/Report no.: | JPL Publication
09-28 |
| Abstract: | Through-silicon via (TSV) is the latest in a progression of technologies for stacking silicon devices in three dimensions (3D). Driven by the need for improved performance, methods to use short vertical interconnects to replace the long interconnects found in 2D structures have been developed. The industry is moving past the feasibility (research and development [R&D]) phase for TSV technology into the commercialization phase where economic realities will determine which technologies are adopted. Low-cost fine via hole formation and highly reliable via filling technologies have been demonstrated; process equipment and materials are available. Even though design, thermal, and test issues remain, much progress has been made. |
| URI: | http://hdl.handle.net/2014/41478 |
| Appears in Collections: | JPL TRS 1992+
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