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Please use this identifier to cite or link to this item:
http://hdl.handle.net/2014/41264
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| Title: | Embedded passives emulator FY2003 interim report |
| Authors: | Gerke, David |
| Keywords: | printed circuit board (PCB)
printed wiring board (PWB)
Embedded Passives |
| Issue Date: | Mar-2009 |
| Publisher: | Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2009. |
| Series/Report no.: | JPL Publication
09-10 |
| Abstract: | The National Aeronautics and Space Administration Electronic Parts and Packaging (NEPP) Program has been evaluating state-of-the-art Embedded Passive Technology for the printed circuit board (PCB) industry for the past several years and has conducted its own testing on embedded passive coupons (resistors and capacitors). This document is a progress report of the work performed through fiscal year 2008 by NASA and the Navy to convert an existing PWB (printed wiring board) design to a design that incorporates embedded passive components. The work is being performed through a memorandum of understanding (MOU) between the NEPP Program (NASA) and the Naval Surface Warfare Center (NSWC) Crane Emerging Critical Interconnect Technology (ECIT) Program. NSWC Crane’s ECIT Program has funding to convert two PCB designs from the military and aerospace industry to a PCB design with embedded passives. ECIT will provide a design team that will take a well characterized design and convert it to an embedded design. They will also provide electrical modeling and layout expertise as well as build the PWB in their facility in Indiana. NEPP, through the Jet Propulsion Laboratory (JPL), will assemble any passives deemed not suitable for embedding and the active components and electrically test the new design to the existing (non-embedded) design |
| URI: | http://hdl.handle.net/2014/41264 |
| Appears in Collections: | JPL TRS 1992+
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