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|Title: ||Product reliability trends, derating considerations and failure mechanisms with scaled CMOS|
|Authors: ||White, Mark|
Bernstein, Joseph B.
|Keywords: ||accelerated stress testing|
CMOS integrated circuits
|Issue Date: ||16-Oct-2006 |
|Citation: ||2006 International Integrated Reliability Workshop Final Report, Oct. 16, 2006,- Sept. 19, 2006,p. 156 - 159; doi:10.1109/IRWS.2006.305234|
|Abstract: ||As microelectronics is scaled into the deep sub-micron regime, space and aerospace users of advanced technology CMOS are reassessing how scaling effects impact long-term product reliability. The effects of electromigration (EM), time-dependent-dielectric-breakdown (TDDB) and hot carrier degradation (HCI and NBTI) wearout mechanisms on scaled technologies and product reliability are investigated, accelerated stress testing across several technology nodes is performed, and FA is conducted to confirm the failure mechanism(s)|
|Appears in Collections:||JPL TRS 1992+|
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