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|Title: ||Single-event upset and scaling trends in new generation of the commercial SOI PowerPC Microprocessors|
|Authors: ||Irom, Farokh|
Kouba, Coy K.
|Keywords: ||single-event upsets|
silicon on insulator
|Issue Date: ||17-Jul-2006 |
|Citation: ||IEEE Transactions On Nuclear Science, Vol. 53, No. 6, December 2006; doi:10.1109/TNS.2006.884383|
|Abstract: ||Single-event upset effects from heavy ions are measured for Motorola silicon-on-insulator (SOI) microprocessor with 90 nm feature sizes. The results are compared with previous results for SOI microprocessors with feature sizes of 130 and 180 nm. The cross section of the 90 nm SOI processors is smaller than results for 130 and 180 nm counterparts, but the threshold is about the same. The scaling of the cross section with reduction of feature size and core voltage for SOI microprocessors is discussed.|
|Appears in Collections:||JPL TRS 1992+|
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