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Title: Accumulate repeat accumulate codes
Authors: Abbasfar, Aliazam
Divsalar, Dariush
Yao, Kung
Keywords: turbo-like codes
Low Density Parity Check codes (LDPC)
iterative decoding on graphs
Issue Date: 29-Nov-2004
Publisher: IEEE
Citation: ISIT 2004, Chicago, USA, June 27 – July 2, 2004
Abstract: In this paper we propose an innovative channel coding scheme called “Accumulate Repeat Accumulate codes” (ARA). This class of codes can be viewed as serial turbo-like codes, or as a subclass of Low Density Parity Check (LDPC) codes, thus belief propagation can be used for iterative decoding of ARA codes on a graph. The structure of encoder for this class can be viewed as precoded Repeat Accumulate (RA) code or as precoded Irregular Repeat Accumulate (IRA) code, where simply an accumulator is chosen as a precoder. Thus ARA codes have simple, and very fast encoder structure when they representing LDPC codes. Based on density evolution for LDPC codes through some examples for ARA codes, we show that for maximum variable node degree 5 a minimum bit SNR as low as 0.08 dB from channel capacity for rate ½ can be achieved as the block size goes to infinity. Thus based on fixed low maximum variable node degree, its threshold outperforms not only the RA and IRA codes but also the best known LDPC codes with the dame maximum node degree. Furthermore by puncturing the accumulators any desired high rate codes close to code rate 1 can be obtained with thresholds that stay close to the channel capacity thresholds uniformly. Iterative decoding simulation results are provided. The ARA codes also have projected graph or protograph representation that allows for high speed decoder implementation
Appears in Collections:JPL TRS 1992+

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