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Please use this identifier to cite or link to this item:
http://hdl.handle.net/2014/38080
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| Title: | On board processor development for NASA's spaceborne imaging radar with system-on-chip technology |
| Authors: | Fang, Wai-Chi |
| Keywords: | radar
system-on-chip
VLSI |
| Issue Date: | May-2004 |
| Publisher: | Pasadena, CA : Jet Propulsion Laboratory, National Aeronautics and Space Administration, 2004. |
| Citation: | 2004 IEEE International Symposium on Circuits and Systems, Vancouver, Canada, May 23, 2004 |
| Abstract: | This paper reports a preliminary study result of an on-board spaceborne SAR processor. It consists of a processing requirement analysis, functional specifications, and implementation with system-on-chip technology. Finally, a minimum version of this on-board processor designed for performance evaluation and for partial demonstration is illustrated. |
| URI: | http://hdl.handle.net/2014/38080 |
| Appears in Collections: | JPL TRS 1992+
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