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|Title: ||Winner/Loser-Take-All Circuits on SOI Technology for Neural Network Classification|
|Authors: ||Duong, T.|
|Issue Date: ||13-Apr-1998 |
|Citation: ||Applications and Science of Computational Intelligence|
Orlando, FL, U.S.A.
|Abstract: ||High connectivity of artificial neural network chip-embodiments combined with currently emerging 3-dimensionally stacked multichip modules for real-time applications of target classification require a scrutiny for low power technology insertion.|
|Appears in Collections:||JPL TRS 1992+|
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